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#fpga

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Hacker News 50<p>Parallelizing SHA256 Calculation on FPGA</p><p>Link: <a href="https://www.controlpaths.com/2025/06/29/parallelizing_sha256-calculation-fpga/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">controlpaths.com/2025/06/29/pa</span><span class="invisible">rallelizing_sha256-calculation-fpga/</span></a><br>Discussion: <a href="https://news.ycombinator.com/item?id=44456027" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.ycombinator.com/item?id=4</span><span class="invisible">4456027</span></a></p><p><a href="https://social.lansky.name/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
François Galea<p>turboerer</p><p><a href="https://pouet.chapril.org/tags/zeST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>zeST</span></a> <a href="https://pouet.chapril.org/tags/Atari" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Atari</span></a> <a href="https://pouet.chapril.org/tags/AtariST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AtariST</span></a> <a href="https://pouet.chapril.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://pouet.chapril.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>retrocomputing</span></a></p>
François Galea<p>btw, turboer</p><p><a href="https://pouet.chapril.org/tags/zeST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>zeST</span></a> <a href="https://pouet.chapril.org/tags/atari" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>atari</span></a> <a href="https://pouet.chapril.org/tags/atariST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>atariST</span></a> <a href="https://pouet.chapril.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://pouet.chapril.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>retrocomputing</span></a></p>
Bose-Einstein-Kondensat<p><a href="https://mstdn.social/tags/BrightEyesTTM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>BrightEyesTTM</span></a>: <a href="https://mstdn.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>OpenSource</span></a> <a href="https://mstdn.social/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a>-based multi-channel time-tagging module (<a href="https://mstdn.social/tags/TTM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>TTM</span></a>) for democratising single-photon (SP) <a href="https://mstdn.social/tags/microscopy" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>microscopy</span></a>:</p><p>-parallel multiple <a href="https://mstdn.social/tags/SP" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>SP</span></a> event tagging precision: 30 ps<br>-multiple synchronisation event precision: 4 ns<br>-requires <a href="https://mstdn.social/tags/LabVIEW" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LabVIEW</span></a><br>-cost ~$3000</p><p>Article: <a href="https://doi.org/10.1038/s41467-022-35064-0" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">doi.org/10.1038/s41467-022-350</span><span class="invisible">64-0</span></a><br>Web: <a href="https://brighteyes-ttm.readthedocs.io/en/latest/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">brighteyes-ttm.readthedocs.io/</span><span class="invisible">en/latest/</span></a><br>GitHub: <a href="https://github.com/VicidominiLab/BrightEyes-TTM" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/VicidominiLab/Brigh</span><span class="invisible">tEyes-TTM</span></a><br><a href="https://mstdn.social/tags/DIYbio" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>DIYbio</span></a> <a href="https://mstdn.social/tags/lab" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>lab</span></a> <a href="https://mstdn.social/tags/instruments" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>instruments</span></a> <a href="https://mstdn.social/tags/LSM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LSM</span></a> <a href="https://mstdn.social/tags/FLISM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FLISM</span></a> <a href="https://mstdn.social/tags/FLFS" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FLFS</span></a> <a href="https://mstdn.social/tags/fluorescence" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fluorescence</span></a> <a href="https://mstdn.social/tags/spectroscopy" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>spectroscopy</span></a> <a href="https://mstdn.social/tags/imaging" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>imaging</span></a> <a href="https://mstdn.social/tags/Python" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Python</span></a></p>
Markus Osterhoff<p>Wenn Licht doch nur 396.322.730 Kilometer pro Sekunde zurücklegen würde hätte der Tag 65.536 Sekunden und ich könnte einen 16 Bit-Counter dafür nehmen …</p><p>Aber nö, es sind bloß 299.792.458 und deshalb braucht eins 17 Bit und davon werden auch noch 0,6 verschwendet.</p><p><a href="https://troet.cafe/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a></p>
François Galea<p>Finally, a new <a href="https://pouet.chapril.org/tags/zeST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>zeST</span></a> release! It's a big one with turbo mode (50&nbsp;MHz!), MIDI support and various fixes. Enjoy!</p><p><a href="https://zest.sector1.fr/posts/release_20250627/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">zest.sector1.fr/posts/release_</span><span class="invisible">20250627/</span></a></p><p><a href="https://pouet.chapril.org/tags/Atari" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Atari</span></a> <a href="https://pouet.chapril.org/tags/AtariST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AtariST</span></a> <a href="https://pouet.chapril.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>retrocomputing</span></a> <a href="https://pouet.chapril.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a></p>
Paolo Amoroso<p>Since I'm not a hardware guy I wasn't aware of the 40th anniversary of the FPGA and assumed it was a more recent innovation.</p><p><a href="https://www.adiuvoengineering.com/post/the-fpga-turns-40" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">adiuvoengineering.com/post/the</span><span class="invisible">-fpga-turns-40</span></a></p><p><a href="https://oldbytes.space/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>retrocomputing</span></a> <a href="https://oldbytes.space/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
Rick Altherr<p>Huh. Microchip started adding a 32 LUT FPGA to some PICs. Mark Omo decided to see how it is configured and found they internally use Yosys. Full RE details: <a href="https://mcp-clb.markomo.me/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">mcp-clb.markomo.me/</span><span class="invisible"></span></a></p><p><a href="https://social.treehouse.systems/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://social.treehouse.systems/tags/openfpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>openfpga</span></a></p>
Jan Beta<p>New video! Testing the ISEVIC that gets you native HDMI output from the Commodore 64's cartridge port.</p><p>YouTube: <a href="https://youtu.be/rcsn17_pJ4E" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">youtu.be/rcsn17_pJ4E</span><span class="invisible"></span></a><br>PeerTube: <a href="https://makertube.net/w/dvSbzFE533RTZnvkVLAm15" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">makertube.net/w/dvSbzFE533RTZn</span><span class="invisible">vkVLAm15</span></a></p><p><a href="https://chaos.social/tags/ISEVIC" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ISEVIC</span></a> <a href="https://chaos.social/tags/BloodMosher" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>BloodMosher</span></a> <a href="https://chaos.social/tags/HDMI" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>HDMI</span></a> <a href="https://chaos.social/tags/Commodore" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Commodore</span></a> <a href="https://chaos.social/tags/C64" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>C64</span></a> <a href="https://chaos.social/tags/Commodore64" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Commodore64</span></a> <a href="https://chaos.social/tags/VideoOut" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>VideoOut</span></a> <a href="https://chaos.social/tags/AV" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AV</span></a> <a href="https://chaos.social/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://chaos.social/tags/Upscaler" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Upscaler</span></a> <a href="https://chaos.social/tags/VICII" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>VICII</span></a> <a href="https://chaos.social/tags/RetroComputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RetroComputing</span></a> <a href="https://chaos.social/tags/RetroGaming" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RetroGaming</span></a> <a href="https://chaos.social/tags/VintageComputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>VintageComputing</span></a></p>
Hacker News 50<p>The FPGA turns 40</p><p>Link: <a href="https://www.adiuvoengineering.com/post/the-fpga-turns-40" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">adiuvoengineering.com/post/the</span><span class="invisible">-fpga-turns-40</span></a><br>Discussion: <a href="https://news.ycombinator.com/item?id=44333033" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.ycombinator.com/item?id=4</span><span class="invisible">4333033</span></a></p><p><a href="https://social.lansky.name/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
Deutschland<p><a href="https://www.europesays.com/de/199392/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="">europesays.com/de/199392/</span><span class="invisible"></span></a> Lattice präsentiert FPGA-Innovationen auf der FPGA Conference Europe 2025 <a href="https://pubeurope.com/tags/AktuelleNachrichten" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AktuelleNachrichten</span></a> <a href="https://pubeurope.com/tags/AktuelleNews" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AktuelleNews</span></a> <a href="https://pubeurope.com/tags/ConferenceEurope" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ConferenceEurope</span></a> <a href="https://pubeurope.com/tags/EU" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>EU</span></a> <a href="https://pubeurope.com/tags/Europa" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Europa</span></a> <a href="https://pubeurope.com/tags/Europ%C3%A4ischeUnion" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>EuropäischeUnion</span></a> <a href="https://pubeurope.com/tags/Europe" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Europe</span></a> <a href="https://pubeurope.com/tags/EuropeanUnion" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>EuropeanUnion</span></a> <a href="https://pubeurope.com/tags/ForschungUndEntwicklung" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ForschungUndEntwicklung</span></a> <a href="https://pubeurope.com/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://pubeurope.com/tags/Headlines" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Headlines</span></a> <a href="https://pubeurope.com/tags/LatticeSemiconductor" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LatticeSemiconductor</span></a> <a href="https://pubeurope.com/tags/Nachrichten" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Nachrichten</span></a> <a href="https://pubeurope.com/tags/News" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>News</span></a> <a href="https://pubeurope.com/tags/Schlagzeilen" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Schlagzeilen</span></a></p>
Topaz 🐇<p>Me: Mom, I want to watch One Piece on the big screen!<br>Mom, who is an FPGA development board: We have One Piece on the big screen at home.</p><p>Verilog-based image stream decoder. A Ruby script sends 96x64 256 color images, each with a unique palette, over UART at 921600 baud at around 13 FPS, and the ULX3S renders them on the OLED screen with double-buffered palettes and image data. Definitely the most complex serial protocol-driven stuff I've written so far. I may try moving the image data storage over to SDRAM, just because. <a href="https://oldbytes.space/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
deadprogram<p>Just released version 0.1 of TinyGo-TKey to develop apps for the Tillitis TKey-1 using TinyGo!</p><p><a href="https://github.com/hybridgroup/tinygo-tkey" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/hybridgroup/tinygo-</span><span class="invisible">tkey</span></a></p><p>TKey-1 is an open source, open hardware FPGA-based USB security token from the awesome team at Tillitis:<br><a href="https://tillitis.se/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">tillitis.se/</span><span class="invisible"></span></a></p><p><a href="https://social.tinygo.org/tags/golang" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>golang</span></a> <a href="https://social.tinygo.org/tags/tinygo" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tinygo</span></a> <a href="https://social.tinygo.org/tags/embedded" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>embedded</span></a> <a href="https://social.tinygo.org/tags/security" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>security</span></a> <a href="https://social.tinygo.org/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://social.tinygo.org/tags/riscv" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscv</span></a></p>
Paula Maddox<p>So, I’m not a programmer, I can usually hack things to make them work. <br>But, I’m stuck so I’m asking for advise please. <br>I’m using windows (not for much longer) and I’ve got a neorisc-v onto my Alchitry au board (it gets to the bootloader) but I can’t seem to compile any of the examples. I found a prebuilt windows compiler (.zip) but I’m lost what to do next. Can anyone help?<br><a href="https://mastodon.social/tags/riscv" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscv</span></a> <a href="https://mastodon.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
Tilda Moose, citizen<p>Finally playing with logic schematic design in <a href="https://mastodon.world/tags/quartus" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>quartus</span></a> for my <a href="https://mastodon.world/tags/DE0" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>DE0</span></a>-nano <a href="https://mastodon.world/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://mastodon.world/tags/dev" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>dev</span></a> board.</p><p>Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, <a href="https://mastodon.world/tags/IDE" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>IDE</span></a> controls to learn.</p><p>Standing on the shoulders of giants. If you FPGA, you rock.</p>
François Galea<p>turbo</p><p><a href="https://pouet.chapril.org/tags/zeST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>zeST</span></a> <a href="https://pouet.chapril.org/tags/atari" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>atari</span></a> <a href="https://pouet.chapril.org/tags/AtariST" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AtariST</span></a> <a href="https://pouet.chapril.org/tags/FPGA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FPGA</span></a> <a href="https://pouet.chapril.org/tags/retrocomputing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>retrocomputing</span></a></p>
obrhoff<p>While I appreciate that Analogue kicked off the FPGA category, I ultimately think they failed.</p><p>Besides their marketing strategy of selling overpriced collectors’ editions of the AP (there are people on Reddit that own all devices), I think adding custom cores was their biggest mistake (and biggest success factor).</p><p>With it, they degraded the experience to yet another device, loaded with tons of stolen ROMs which you may play for 5 minutes and then scroll to another game.<br><a href="https://mastodon.social/tags/AnaloguePocket" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AnaloguePocket</span></a> <a href="https://mastodon.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
Hacker News 50<p>Show HN: Icepi Zero – The FPGA Raspberry Pi Zero Equivalent</p><p>Link: <a href="https://github.com/cheyao/icepi-zero" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">github.com/cheyao/icepi-zero</span><span class="invisible"></span></a><br>Discussion: <a href="https://news.ycombinator.com/item?id=44115853" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.ycombinator.com/item?id=4</span><span class="invisible">4115853</span></a></p><p><a href="https://social.lansky.name/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a></p>
Tilda Moose, citizen<p>Joy... win11 accepts my old <a href="https://mastodon.world/tags/DE0" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>DE0</span></a>-Nano <a href="https://mastodon.world/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> dev board's <a href="https://mastodon.world/tags/Altera" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Altera</span></a> <a href="https://mastodon.world/tags/usb" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>usb</span></a> <a href="https://mastodon.world/tags/blaster" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>blaster</span></a> drivers, and a demo prog now talks to the&nbsp;board.&nbsp;Whoosh.</p><p>Next, I pray that I get good at turning logic design schematics into deployable code.</p>
Topaz 🐇<p>OK this is pretty cool. A project called DigitalJS can give you a visual layout of all of the logic that'll go into a Verilog design, using Yosys to do the generation. Being able to see what's being ultimately produced helps me, a much more visual person, understand when I've flubbed something that generates too much logic. I already optimized one piece of the display RAM using it. It's at <a href="https://digitaljs.tilk.eu/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">digitaljs.tilk.eu/</span><span class="invisible"></span></a> but you can also run it locally. <a href="https://oldbytes.space/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://oldbytes.space/tags/verilog" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>verilog</span></a> <a href="https://oldbytes.space/tags/ulx3s" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ulx3s</span></a></p>